SPM: Remove SP memory mappings definitions
authorAntonio Nino Diaz <[email protected]>
Tue, 30 Oct 2018 11:54:20 +0000 (11:54 +0000)
committerAntonio Nino Diaz <[email protected]>
Mon, 10 Dec 2018 16:37:46 +0000 (16:37 +0000)
This information is retrieved from the resource description now.

Change-Id: Iaae23945eb2c45305cdc6442853e42f4e04fe094
Co-authored-by: Sandrine Bailleux <[email protected]>
Signed-off-by: Antonio Nino Diaz <[email protected]>
include/plat/arm/common/arm_spm_def.h
include/plat/arm/common/plat_arm.h
plat/arm/board/fvp/fvp_common.c
services/std_svc/spm/sp_setup.c
services/std_svc/spm/sp_xlat.c
services/std_svc/spm/spm_main.c

index a22209957a7cf3c716c9fd65c7319a5a4896e4c0..6fa5615ea09d6d7833b722f81985ef5b25a65c34 100644 (file)
@@ -27,6 +27,9 @@
                                                ARM_SP_IMAGE_SIZE,              \
                                                MT_MEMORY | MT_RW | MT_SECURE)
 #endif
+
+#if SPM_DEPRECATED
+
 #ifdef IMAGE_BL31
 /* SPM Payload memory. Mapped as code in S-EL1 */
 #define ARM_SP_IMAGE_MMAP              MAP_REGION2(                            \
@@ -96,6 +99,8 @@
 /* Total number of memory regions with distinct properties */
 #define ARM_SP_IMAGE_NUM_MEM_REGIONS   6
 
+#endif /* SPM_DEPRECATED */
+
 /* Cookies passed to the Secure Partition at boot. Not used by ARM platforms. */
 #define PLAT_SPM_COOKIE_0              ULL(0)
 #define PLAT_SPM_COOKIE_1              ULL(0)
index e7082d080a30e1bf29a9c997e563d4eae56b8901..9b459841ce003a8fe666917a27b22b7ba5e01623 100644 (file)
@@ -37,7 +37,7 @@ typedef struct arm_tzc_regions_info {
  *   - Region 1 with secure access only;
  *   - the remaining DRAM regions access from the given Non-Secure masters.
  ******************************************************************************/
-#if ENABLE_SPM
+#if ENABLE_SPM && SPM_DEPRECATED
 #define ARM_TZC_REGIONS_DEF                                            \
        {ARM_AP_TZC_DRAM1_BASE, ARM_EL3_TZC_DRAM1_END,                  \
                TZC_REGION_S_RDWR, 0},                                  \
index 4ef86675f8c5180815b85447fadae79c05ddf6ec..66650eecd8d255bf530d793f2ba156a12433ad0e 100644 (file)
@@ -124,13 +124,13 @@ const mmap_region_t plat_arm_mmap[] = {
        MAP_DEVICE0,
        MAP_DEVICE1,
        ARM_V2M_MAP_MEM_PROTECT,
-#if ENABLE_SPM
+#if ENABLE_SPM && SPM_DEPRECATED
        ARM_SPM_BUF_EL3_MMAP,
 #endif
        {0}
 };
 
-#if ENABLE_SPM && defined(IMAGE_BL31)
+#if ENABLE_SPM && defined(IMAGE_BL31) && SPM_DEPRECATED
 const mmap_region_t plat_arm_secure_partition_mmap[] = {
        V2M_MAP_IOFPGA_EL0, /* for the UART */
        MAP_REGION_FLAT(DEVICE0_BASE,                           \
@@ -232,7 +232,6 @@ const struct secure_partition_boot_info *plat_get_secure_partition_boot_info(
 {
        return &plat_arm_secure_partition_boot_info;
 }
-
 #endif
 
 /*******************************************************************************
index 04eedff48db7c640fe9cace4398505f277f1d970..b1f651f068debfa39d00df9f9e21d21889bfbcee 100644 (file)
@@ -13,7 +13,6 @@
 #include <debug.h>
 #include <platform_def.h>
 #include <platform.h>
-#include <secure_partition.h>
 #include <string.h>
 #include <xlat_tables_v2.h>
 
@@ -39,57 +38,24 @@ void spm_sp_setup(sp_context_t *sp_ctx)
        ep_info.spsr = SPSR_64(MODE_EL0, MODE_SP_EL0, DISABLE_ALL_EXCEPTIONS);
 
        /*
-        * X0: Virtual address of a buffer shared between EL3 and Secure EL0.
-        *     The buffer will be mapped in the Secure EL1 translation regime
-        *     with Normal IS WBWA attributes and RO data and Execute Never
-        *     instruction access permissions.
-        *
-        * X1: Size of the buffer in bytes
-        *
+        * X0: Unused (MBZ).
+        * X1: Unused (MBZ).
         * X2: cookie value (Implementation Defined)
-        *
         * X3: cookie value (Implementation Defined)
-        *
         * X4 to X7 = 0
         */
-       ep_info.args.arg0 = PLAT_SPM_BUF_BASE;
-       ep_info.args.arg1 = PLAT_SPM_BUF_SIZE;
+       ep_info.args.arg0 = 0;
+       ep_info.args.arg1 = 0;
        ep_info.args.arg2 = PLAT_SPM_COOKIE_0;
        ep_info.args.arg3 = PLAT_SPM_COOKIE_1;
 
        cm_setup_context(ctx, &ep_info);
 
-       /*
-        * SP_EL0: A non-zero value will indicate to the SP that the SPM has
-        * initialized the stack pointer for the current CPU through
-        * implementation defined means. The value will be 0 otherwise.
-        */
-       write_ctx_reg(get_gpregs_ctx(ctx), CTX_GPREG_SP_EL0,
-                       PLAT_SP_IMAGE_STACK_BASE + PLAT_SP_IMAGE_STACK_PCPU_SIZE);
-
        /*
         * Setup translation tables
         * ------------------------
         */
 
-#if ENABLE_ASSERTIONS
-
-       /* Get max granularity supported by the platform. */
-       unsigned int max_granule = xlat_arch_get_max_supported_granule_size();
-
-       VERBOSE("Max translation granule size supported: %u KiB\n",
-               max_granule / 1024U);
-
-       unsigned int max_granule_mask = max_granule - 1U;
-
-       /* Base must be aligned to the max granularity */
-       assert((ARM_SP_IMAGE_NS_BUF_BASE & max_granule_mask) == 0);
-
-       /* Size must be a multiple of the max granularity */
-       assert((ARM_SP_IMAGE_NS_BUF_SIZE & max_granule_mask) == 0);
-
-#endif /* ENABLE_ASSERTIONS */
-
        /* This region contains the exception vectors used at S-EL1. */
        const mmap_region_t sel1_exception_vectors =
                MAP_REGION_FLAT(SPM_SHIM_EXCEPTIONS_START,
index 3527138600c83f867f489311c3e29abf7993d3b9..881d97f3503917eaa2049812ca7b1177598397dd 100644 (file)
@@ -10,7 +10,6 @@
 #include <errno.h>
 #include <platform_def.h>
 #include <platform.h>
-#include <secure_partition.h>
 #include <spm_svc.h>
 #include <xlat_tables_v2.h>
 
index 880e86e49603c23666ddafcb1b07ab7035c85826..ad1262cbe61588b1372eec3b9e874d6d6eabb4c2 100644 (file)
@@ -14,7 +14,6 @@
 #include <mm_svc.h>
 #include <platform.h>
 #include <runtime_svc.h>
-#include <secure_partition.h>
 #include <smccc.h>
 #include <smccc_helpers.h>
 #include <spinlock.h>